81 lines
1.5 KiB
ArmAsm
81 lines
1.5 KiB
ArmAsm
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.equ ADDR_BASE, 0xBF88
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.equ TRISB, 0x6040
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.equ PORTB, 0x6050
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.equ LATB, 0x6060
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.equ TRISC, 0x6080
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.equ PORTC, 0x6090
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.equ LATC, 0x60A0
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.equ TRISD, 0x60C0
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.equ PORTD, 0x60D0
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.equ LATD, 0x60E0
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.equ TRISE, 0x6100
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.equ PORTE, 0x6110
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.equ LATE, 0x6120
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.equ READ_CORE_TIMER, 11
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.equ RESET_CORE_TIMER, 12
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.data
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.text
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.globl main
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# Mapa de registos
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# $t7: endereço base periféricos
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# $t0: contador
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main:
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lui $t7, ADDR_BASE
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lw $t0, TRISE($t7)
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andi $t0, $t0, 0xFFE1 # 1111 1111 1110 0001 (isola bits 4-1)
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sw $t0, TRISE($t7) # Configura RE4-RE1 como output
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lw $t1, TRISB($t7)
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ori $t1, $t1, 0x0004 # 0000 0000 0000 0010 (isola bit 1)
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sw $t1, TRISB($t7) # Configura RB1 como input
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li $t0, 0x0010 # Iniciar contagem
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loop:
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lw $t2, LATE($t7)
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andi $t2, $t2, 0xFFE1 # 1111 1111 1110 0001 (reset bits 4-1)
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sll $t3, $t0, 1 # shift do contador para os bits 4-1
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or $t2, $t2, $t3 # merge contador com valor do LATE
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sw $t2, LATE($t7) # atualiza valor do LATE
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li $v0, RESET_CORE_TIMER
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syscall
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delay:
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li $v0, READ_CORE_TIMER
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syscall
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move $t6, $v0
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blt $t6, 13333333, delay
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switch_check:
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lw $t6, PORTB($t7)
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andi $t6, $t6, 0x0004 # 0000 0000 0000 0100 (isola bit 3)
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lw $t4, LATE($t7)
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beqz $t6, move_right
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move_left:
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andi $t4, $t4, 0x0010
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srl $t4, $t4, 4
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xori $t4, $t4, 0x0001
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sll $t0, $t0, 1
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or $t0, $t0, $t4
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j switch_end
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move_right:
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andi $t4, $t4, 0x0002
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sll $t4, $t4, 2
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xori $t4, $t4, 0x0008
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srl $t0, $t0, 1
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or $t0, $t0, $t4
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switch_end:
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j loop
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