149 lines
1.2 KiB
Plaintext
149 lines
1.2 KiB
Plaintext
$comment
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File created using the following command:
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vcd file GateDemo.msim.vcd -direction
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$end
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$date
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Sat Feb 18 14:55:14 2023
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$end
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$version
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ModelSim Version 2020.1
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$end
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$timescale
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1ps
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$end
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$scope module gatedemo_vhd_vec_tst $end
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$var wire 1 ! LEDR [0] $end
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$var wire 1 " SW [1] $end
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$var wire 1 # SW [0] $end
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$scope module i1 $end
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$var wire 1 $ gnd $end
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$var wire 1 % vcc $end
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$var wire 1 & unknown $end
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$var wire 1 ' devoe $end
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$var wire 1 ( devclrn $end
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$var wire 1 ) devpor $end
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$var wire 1 * ww_devoe $end
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$var wire 1 + ww_devclrn $end
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$var wire 1 , ww_devpor $end
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$var wire 1 - ww_LEDR [0] $end
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$var wire 1 . ww_SW [1] $end
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$var wire 1 / ww_SW [0] $end
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$var wire 1 0 \LEDR[0]~output_o\ $end
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$var wire 1 1 \SW[1]~input_o\ $end
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$var wire 1 2 \SW[0]~input_o\ $end
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$var wire 1 3 \inst~combout\ $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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$dumpvars
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$end
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