uaveiro-leci/1ano/2semestre/lsd/pratica02/DisplayDemoVHDL/output_files/DisplayDemoVHDL.fit.summary

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Fitter Status : Successful - Wed Mar 8 20:54:22 2023
Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
Revision Name : DisplayDemoVHDL
Top-level Entity Name : DisplayDemoVHDL
Family : Cyclone IV E
Device : EP4CE115F29C7
Timing Models : Final
Total logic elements : 14 / 114,480 ( < 1 % )
Total combinational functions : 14 / 114,480 ( < 1 % )
Dedicated logic registers : 0 / 114,480 ( 0 % )
Total registers : 0
Total pins : 24 / 529 ( 5 % )
Total virtual pins : 0
Total memory bits : 0 / 3,981,312 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 532 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )