43 lines
19 KiB
Plaintext
43 lines
19 KiB
Plaintext
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1679318131335 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1679318131336 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 20 13:15:31 2023 " "Processing started: Mon Mar 20 13:15:31 2023" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1679318131336 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131336 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta CounterDemo -c CounterDemo " "Command: quartus_sta CounterDemo -c CounterDemo" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131336 ""}
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{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1679318131355 ""}
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{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Timing Analyzer" 0 -1 1679318131412 ""}
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{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1679318131412 ""}
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{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131454 ""}
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{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131454 ""}
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{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "CounterDemo.sdc " "Synopsys Design Constraints File file not found: 'CounterDemo.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1679318131740 ""}
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{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131740 ""}
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{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name FreqDivider:inst1\|clkOut FreqDivider:inst1\|clkOut " "create_clock -period 1.000 -name FreqDivider:inst1\|clkOut FreqDivider:inst1\|clkOut" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1679318131740 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1679318131740 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131740 ""}
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{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131741 ""}
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{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131741 ""}
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{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1679318131741 ""}
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{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Timing Analyzer" 0 0 1679318131744 ""}
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{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1679318131749 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1679318131749 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "setup -4.122 " "Worst-case setup slack is -4.122" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.122 -69.260 CLOCK_50 " " -4.122 -69.260 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.839 -1.988 FreqDivider:inst1\|clkOut " " -0.839 -1.988 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131750 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.408 " "Worst-case hold slack is 0.408" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.408 0.000 FreqDivider:inst1\|clkOut " " 0.408 0.000 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.652 0.000 CLOCK_50 " " 0.652 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131750 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131750 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318131751 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318131751 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131752 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131752 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -45.405 CLOCK_50 " " -3.000 -45.405 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131752 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.285 -5.140 FreqDivider:inst1\|clkOut " " -1.285 -5.140 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131752 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131752 ""}
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{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1679318131764 ""}
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{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1679318131776 ""}
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{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1679318131929 ""}
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{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131942 ""}
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{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1679318131944 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1679318131944 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "setup -3.714 " "Worst-case setup slack is -3.714" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131944 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131944 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.714 -59.180 CLOCK_50 " " -3.714 -59.180 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131944 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.650 -1.486 FreqDivider:inst1\|clkOut " " -0.650 -1.486 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131944 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131944 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.364 " "Worst-case hold slack is 0.364" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131945 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131945 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.364 0.000 FreqDivider:inst1\|clkOut " " 0.364 0.000 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131945 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.596 0.000 CLOCK_50 " " 0.596 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131945 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131945 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318131946 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318131947 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131948 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131948 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -45.405 CLOCK_50 " " -3.000 -45.405 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131948 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.285 -5.140 FreqDivider:inst1\|clkOut " " -1.285 -5.140 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131948 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131948 ""}
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{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1679318131961 ""}
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{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1679318131998 ""}
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{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1679318131998 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1679318131998 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "setup -1.587 " "Worst-case setup slack is -1.587" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131999 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131999 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.587 -18.604 CLOCK_50 " " -1.587 -18.604 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131999 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.109 0.000 FreqDivider:inst1\|clkOut " " 0.109 0.000 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318131999 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318131999 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.188 " "Worst-case hold slack is 0.188" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132000 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132000 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.188 0.000 FreqDivider:inst1\|clkOut " " 0.188 0.000 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132000 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.297 0.000 CLOCK_50 " " 0.297 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132000 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318132000 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318132001 ""}
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{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1679318132002 ""}
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{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132003 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132003 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -38.022 CLOCK_50 " " -3.000 -38.022 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132003 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -4.000 FreqDivider:inst1\|clkOut " " -1.000 -4.000 FreqDivider:inst1\|clkOut " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1679318132003 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1679318132003 ""}
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{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1679318132228 ""}
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{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1679318132228 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 5 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "538 " "Peak virtual memory: 538 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1679318132244 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 20 13:15:32 2023 " "Processing ended: Mon Mar 20 13:15:32 2023" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1679318132244 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1679318132244 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1679318132244 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1679318132244 ""}
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