uaveiro-leci/1ano/2semestre/lsd/pratica02/DisplayDemoVHDL/output_files/DisplayDemoVHDL.map.summary

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Analysis & Synthesis Status : Successful - Wed Mar 8 20:54:15 2023
Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
Revision Name : DisplayDemoVHDL
Top-level Entity Name : DisplayDemoVHDL
Family : Cyclone IV E
Total logic elements : 14
Total combinational functions : 14
Dedicated logic registers : 0
Total registers : 0
Total pins : 24
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0