TiagoRG 4d23ebbdc1 LSD aula01 initial commit, base VHDL files, to be finished along the hardware		2023-02-20 22:37:38 +00:00
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GateDemo.asm.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.done	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.eda.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.fit.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.fit.smsg	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.fit.summary	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.flow.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.jdi	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.map.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.map.summary	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.pin	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.sld	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.sof	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.sta.rpt	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00
GateDemo.sta.summary	LSD aula01 initial commit, base VHDL files, to be finished along the hardware	2023-02-20 22:37:38 +00:00