16 lines
12 KiB
Plaintext
16 lines
12 KiB
Plaintext
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1669913613849 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1669913613849 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Dec 1 16:53:33 2022 " "Processing started: Thu Dec 1 16:53:33 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1669913613849 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1669913613849 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off AdderDemo -c AdderDemo " "Command: quartus_map --read_settings_files=on --write_settings_files=off AdderDemo -c AdderDemo" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1669913613849 ""}
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{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1669913613941 ""}
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{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1669913613941 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "AdderDemo.bdf 1 1 " "Found 1 design units, including 1 entities, in source file AdderDemo.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 AdderDemo " "Found entity 1: AdderDemo" { } { { "AdderDemo.bdf" "" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1669913618851 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1669913618851 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Adder.bdf 1 1 " "Found 1 design units, including 1 entities, in source file Adder.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 Adder " "Found entity 1: Adder" { } { { "Adder.bdf" "" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/Adder.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1669913618851 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1669913618851 ""}
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{ "Info" "ISGN_START_ELABORATION_TOP" "Adder " "Elaborating entity \"Adder\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1669913618873 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "AdderDemo AdderDemo:inst6 " "Elaborating entity \"AdderDemo\" for hierarchy \"AdderDemo:inst6\"" { } { { "Adder.bdf" "inst6" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/Adder.bdf" { { 264 608 704 360 "inst6" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1669913618874 ""}
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{ "Error" "ESGN_MULTIPLE_SOURCE" "S S " "Net \"S\", which fans out to \"S\", cannot be assigned more than one value" { { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst\|S " "Net is fed by \"AdderDemo:inst\|S\"" { } { { "AdderDemo.bdf" "S" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 136 456 632 152 "S" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst3\|S " "Net is fed by \"AdderDemo:inst3\|S\"" { } { { "AdderDemo.bdf" "S" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 136 456 632 152 "S" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst4\|S " "Net is fed by \"AdderDemo:inst4\|S\"" { } { { "AdderDemo.bdf" "S" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 136 456 632 152 "S" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst6\|S " "Net is fed by \"AdderDemo:inst6\|S\"" { } { { "AdderDemo.bdf" "S" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 136 456 632 152 "S" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} } { { "Adder.bdf" "S" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/Adder.bdf" { { 368 728 904 384 "S" "" } } } } } 0 12014 "Net \"%1!s!\", which fans out to \"%2!s!\", cannot be assigned more than one value" 0 0 "Analysis & Synthesis" 0 -1 1669913618894 ""}
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{ "Error" "ESGN_MULTIPLE_SOURCE" "AdderDemo:inst\|gdfx_temp0 AdderDemo:inst\|inst6 " "Net \"AdderDemo:inst\|gdfx_temp0\", which fans out to \"AdderDemo:inst\|inst6\", cannot be assigned more than one value" { { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst\|Cin " "Net is fed by \"AdderDemo:inst\|Cin\"" { } { { "AdderDemo.bdf" "Cin" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -64 0 168 -48 "Cin" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst\|A " "Net is fed by \"AdderDemo:inst\|A\"" { } { { "AdderDemo.bdf" "A" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -32 0 168 -16 "A" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst\|B " "Net is fed by \"AdderDemo:inst\|B\"" { } { { "AdderDemo.bdf" "B" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 0 0 168 16 "B" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} } { { "AdderDemo.bdf" "inst6" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 32 312 376 80 "inst6" "" } } } } } 0 12014 "Net \"%1!s!\", which fans out to \"%2!s!\", cannot be assigned more than one value" 0 0 "Analysis & Synthesis" 0 -1 1669913618894 ""}
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{ "Error" "ESGN_MULTIPLE_SOURCE" "AdderDemo:inst3\|gdfx_temp0 AdderDemo:inst3\|inst6 " "Net \"AdderDemo:inst3\|gdfx_temp0\", which fans out to \"AdderDemo:inst3\|inst6\", cannot be assigned more than one value" { { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst3\|Cin " "Net is fed by \"AdderDemo:inst3\|Cin\"" { } { { "AdderDemo.bdf" "Cin" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -64 0 168 -48 "Cin" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst3\|A " "Net is fed by \"AdderDemo:inst3\|A\"" { } { { "AdderDemo.bdf" "A" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -32 0 168 -16 "A" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst3\|B " "Net is fed by \"AdderDemo:inst3\|B\"" { } { { "AdderDemo.bdf" "B" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 0 0 168 16 "B" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} } { { "AdderDemo.bdf" "inst6" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 32 312 376 80 "inst6" "" } } } } } 0 12014 "Net \"%1!s!\", which fans out to \"%2!s!\", cannot be assigned more than one value" 0 0 "Analysis & Synthesis" 0 -1 1669913618894 ""}
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{ "Error" "ESGN_MULTIPLE_SOURCE" "AdderDemo:inst4\|gdfx_temp0 AdderDemo:inst4\|inst6 " "Net \"AdderDemo:inst4\|gdfx_temp0\", which fans out to \"AdderDemo:inst4\|inst6\", cannot be assigned more than one value" { { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst4\|Cin " "Net is fed by \"AdderDemo:inst4\|Cin\"" { } { { "AdderDemo.bdf" "Cin" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -64 0 168 -48 "Cin" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst4\|A " "Net is fed by \"AdderDemo:inst4\|A\"" { } { { "AdderDemo.bdf" "A" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -32 0 168 -16 "A" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst4\|B " "Net is fed by \"AdderDemo:inst4\|B\"" { } { { "AdderDemo.bdf" "B" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 0 0 168 16 "B" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} } { { "AdderDemo.bdf" "inst6" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 32 312 376 80 "inst6" "" } } } } } 0 12014 "Net \"%1!s!\", which fans out to \"%2!s!\", cannot be assigned more than one value" 0 0 "Analysis & Synthesis" 0 -1 1669913618894 ""}
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{ "Error" "ESGN_MULTIPLE_SOURCE" "AdderDemo:inst6\|gdfx_temp0 AdderDemo:inst6\|inst6 " "Net \"AdderDemo:inst6\|gdfx_temp0\", which fans out to \"AdderDemo:inst6\|inst6\", cannot be assigned more than one value" { { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst6\|Cin " "Net is fed by \"AdderDemo:inst6\|Cin\"" { } { { "AdderDemo.bdf" "Cin" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -64 0 168 -48 "Cin" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst6\|A " "Net is fed by \"AdderDemo:inst6\|A\"" { } { { "AdderDemo.bdf" "A" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { -32 0 168 -16 "A" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} { "Error" "ESGN_SUB_MULTIPLE_SOURCE" "AdderDemo:inst6\|B " "Net is fed by \"AdderDemo:inst6\|B\"" { } { { "AdderDemo.bdf" "B" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 0 0 168 16 "B" "" } } } } } 0 12015 "Net is fed by \"%1!s!\"" 0 0 "Design Software" 0 -1 1669913618894 ""} } { { "AdderDemo.bdf" "inst6" { Schematic "/home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/AdderDemo/AdderDemo.bdf" { { 32 312 376 80 "inst6" "" } } } } } 0 12014 "Net \"%1!s!\", which fans out to \"%2!s!\", cannot be assigned more than one value" 0 0 "Analysis & Synthesis" 0 -1 1669913618894 ""}
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{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 21 s 1 Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 21 errors, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "352 " "Peak virtual memory: 352 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1669913618917 ""} { "Error" "EQEXE_END_BANNER_TIME" "Thu Dec 1 16:53:38 2022 " "Processing ended: Thu Dec 1 16:53:38 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1669913618917 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1669913618917 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:14 " "Total CPU time (on all processors): 00:00:14" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1669913618917 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1669913618917 ""}
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