182 lines
4.7 KiB
Plaintext
182 lines
4.7 KiB
Plaintext
/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 2020 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details, at
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https://fpgasoftware.intel.com/eula.
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*/
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(pin
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(input)
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(rect 272 160 440 176)
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(text "INPUT" (rect 125 0 154 10)(font "Arial" (font_size 6)))
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(text "inst" (rect 8 96 26 107)(font "Arial" ))
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(port
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(input)
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(line (pt 0 32)(pt 16 32)(line_width 3))
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(line (pt 0 48)(pt 16 48)(line_width 3))
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)
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(port
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(pt 0 64)
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(input)
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(text "op[2..0]" (rect 0 0 37 11)(font "Arial" ))
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(text "op[2..0]" (rect 21 59 58 70)(font "Arial" ))
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(line (pt 0 64)(pt 16 64)(line_width 3))
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)
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(text "r[n-1..0]" (rect 0 0 38 11)(font "Arial" ))
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(line (pt 168 32)(pt 152 32)(line_width 3))
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)
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(output)
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(text "m[n-1..0]" (rect 0 0 43 11)(font "Arial" ))
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)
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(parameter
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"N"
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"6"
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""
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(type "PARAMETER_SIGNED_DEC") )
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)
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(bus)
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)
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(connector
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(pt 448 168)
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(pt 440 168)
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(bus)
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)
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(pt 440 184)
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(bus)
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)
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(connector
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(pt 616 152)
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(pt 624 152)
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(bus)
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)
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(connector
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(pt 616 168)
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(pt 624 168)
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(bus)
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)
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