2884 lines
12 KiB
Plaintext
2884 lines
12 KiB
Plaintext
$comment
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File created using the following command:
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vcd file EqCmpDemo.msim.vcd -direction
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$end
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$date
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Tue Mar 7 20:57:58 2023
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$end
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$version
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ModelSim Version 2020.1
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$end
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$timescale
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1ps
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$end
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$scope module eqcmpdemo_vhd_vec_tst $end
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$var wire 1 ! LEDG [0] $end
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$var wire 1 " SW [7] $end
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$var wire 1 # SW [6] $end
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$var wire 1 $ SW [5] $end
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$var wire 1 % SW [4] $end
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$var wire 1 & SW [3] $end
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$var wire 1 ' SW [2] $end
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$var wire 1 ( SW [1] $end
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$var wire 1 ) SW [0] $end
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$scope module i1 $end
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$var wire 1 * gnd $end
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$var wire 1 + vcc $end
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$var wire 1 , unknown $end
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$var wire 1 - devoe $end
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$var wire 1 . devclrn $end
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$var wire 1 / devpor $end
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$var wire 1 0 ww_devoe $end
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$var wire 1 1 ww_devclrn $end
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$var wire 1 2 ww_devpor $end
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$var wire 1 3 ww_LEDG [0] $end
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$var wire 1 4 ww_SW [7] $end
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$var wire 1 5 ww_SW [6] $end
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$var wire 1 6 ww_SW [5] $end
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$var wire 1 7 ww_SW [4] $end
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$var wire 1 8 ww_SW [3] $end
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$var wire 1 9 ww_SW [2] $end
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$var wire 1 : ww_SW [1] $end
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$var wire 1 ; ww_SW [0] $end
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$var wire 1 < \LEDG[0]~output_o\ $end
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$var wire 1 = \SW[1]~input_o\ $end
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$var wire 1 > \SW[0]~input_o\ $end
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$var wire 1 ? \SW[5]~input_o\ $end
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$var wire 1 @ \SW[4]~input_o\ $end
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$var wire 1 A \inst1|inst~0_combout\ $end
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$var wire 1 B \SW[7]~input_o\ $end
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$var wire 1 C \SW[6]~input_o\ $end
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$var wire 1 D \SW[3]~input_o\ $end
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$var wire 1 E \SW[2]~input_o\ $end
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$var wire 1 F \inst1|inst~1_combout\ $end
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$var wire 1 G \inst1|inst~combout\ $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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$dumpvars
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