|DisplayDemoVHDL SW[0] => bin7segdecoder:system_core.binInput[0] SW[0] => LEDG[0].DATAIN SW[1] => bin7segdecoder:system_core.binInput[1] SW[1] => LEDG[1].DATAIN SW[2] => bin7segdecoder:system_core.binInput[2] SW[2] => LEDG[2].DATAIN SW[3] => bin7segdecoder:system_core.binInput[3] SW[3] => LEDG[3].DATAIN KEY[0] => bin7segdecoder:system_core.enable KEY[1] => ~NO_FANOUT~ LEDG[0] <= SW[0].DB_MAX_OUTPUT_PORT_TYPE LEDG[1] <= SW[1].DB_MAX_OUTPUT_PORT_TYPE LEDG[2] <= SW[2].DB_MAX_OUTPUT_PORT_TYPE LEDG[3] <= SW[3].DB_MAX_OUTPUT_PORT_TYPE LEDR[0] <= bin7segdecoder:system_core.decOut_n[0] LEDR[1] <= bin7segdecoder:system_core.decOut_n[1] LEDR[2] <= bin7segdecoder:system_core.decOut_n[2] LEDR[3] <= bin7segdecoder:system_core.decOut_n[3] LEDR[4] <= bin7segdecoder:system_core.decOut_n[4] LEDR[5] <= bin7segdecoder:system_core.decOut_n[5] LEDR[6] <= bin7segdecoder:system_core.decOut_n[6] HEX0[0] <= bin7segdecoder:system_core.decOut_n[0] HEX0[1] <= bin7segdecoder:system_core.decOut_n[1] HEX0[2] <= bin7segdecoder:system_core.decOut_n[2] HEX0[3] <= bin7segdecoder:system_core.decOut_n[3] HEX0[4] <= bin7segdecoder:system_core.decOut_n[4] HEX0[5] <= bin7segdecoder:system_core.decOut_n[5] HEX0[6] <= bin7segdecoder:system_core.decOut_n[6] |DisplayDemoVHDL|Bin7SegDecoder:system_core binInput[0] => Equal0.IN3 binInput[0] => Equal1.IN0 binInput[0] => Equal2.IN3 binInput[0] => Equal3.IN1 binInput[0] => Equal4.IN3 binInput[0] => Equal5.IN1 binInput[0] => Equal6.IN3 binInput[0] => Equal7.IN2 binInput[0] => Equal8.IN3 binInput[0] => Equal9.IN1 binInput[0] => Equal10.IN3 binInput[0] => Equal11.IN2 binInput[0] => Equal12.IN3 binInput[0] => Equal13.IN2 binInput[0] => Equal14.IN3 binInput[1] => Equal0.IN2 binInput[1] => Equal1.IN3 binInput[1] => Equal2.IN0 binInput[1] => Equal3.IN0 binInput[1] => Equal4.IN2 binInput[1] => Equal5.IN3 binInput[1] => Equal6.IN1 binInput[1] => Equal7.IN1 binInput[1] => Equal8.IN2 binInput[1] => Equal9.IN3 binInput[1] => Equal10.IN1 binInput[1] => Equal11.IN1 binInput[1] => Equal12.IN2 binInput[1] => Equal13.IN3 binInput[1] => Equal14.IN2 binInput[2] => Equal0.IN1 binInput[2] => Equal1.IN2 binInput[2] => Equal2.IN2 binInput[2] => Equal3.IN3 binInput[2] => Equal4.IN0 binInput[2] => Equal5.IN0 binInput[2] => Equal6.IN0 binInput[2] => Equal7.IN0 binInput[2] => Equal8.IN1 binInput[2] => Equal9.IN2 binInput[2] => Equal10.IN2 binInput[2] => Equal11.IN3 binInput[2] => Equal12.IN1 binInput[2] => Equal13.IN1 binInput[2] => Equal14.IN1 binInput[3] => Equal0.IN0 binInput[3] => Equal1.IN1 binInput[3] => Equal2.IN1 binInput[3] => Equal3.IN2 binInput[3] => Equal4.IN1 binInput[3] => Equal5.IN2 binInput[3] => Equal6.IN2 binInput[3] => Equal7.IN3 binInput[3] => Equal8.IN0 binInput[3] => Equal9.IN0 binInput[3] => Equal10.IN0 binInput[3] => Equal11.IN0 binInput[3] => Equal12.IN0 binInput[3] => Equal13.IN0 binInput[3] => Equal14.IN0 enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT enable => decOut_n.OUTPUTSELECT decOut_n[0] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[1] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[2] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[3] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[4] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[5] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE decOut_n[6] <= decOut_n.DB_MAX_OUTPUT_PORT_TYPE