/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2020  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions 
and other software and tools, and any partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Intel Program License 
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "graphic" (version "1.4"))
(pin
	(input)
	(rect 296 200 464 216)
	(text "INPUT" (rect 125 0 154 10)(font "Arial" (font_size 6)))
	(text "SW[3..0]" (rect 5 0 49 13)(font "Intel Clear" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 149 17)(font "Arial" (font_size 6)))
	(annotation_block (location)(rect 232 216 296 232))
)
(pin
	(input)
	(rect 296 216 464 232)
	(text "INPUT" (rect 125 0 154 10)(font "Arial" (font_size 6)))
	(text "SW[7..4]" (rect 5 0 49 13)(font "Intel Clear" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 149 17)(font "Arial" (font_size 6)))
	(annotation_block (location)(rect 232 232 296 248))
)
(pin
	(output)
	(rect 648 200 824 216)
	(text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6)))
	(text "LEDG[0]" (rect 90 0 132 11)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8))
		(line (pt 52 4)(pt 78 4))
		(line (pt 52 12)(pt 78 12))
		(line (pt 52 12)(pt 52 4))
		(line (pt 78 4)(pt 82 8))
		(line (pt 82 8)(pt 78 12))
		(line (pt 78 12)(pt 82 8))
	)
	(annotation_block (location)(rect 824 216 880 232))
)
(symbol
	(rect 472 176 640 272)
	(text "EqCmp4" (rect 5 0 55 15)(font "Intel Clear" (font_size 8)))
	(text "inst" (rect 8 79 28 92)(font "Intel Clear" ))
	(port
		(pt 0 32)
		(input)
		(text "input0[3..0]" (rect 0 0 67 15)(font "Intel Clear" (font_size 8)))
		(text "input0[3..0]" (rect 21 27 88 42)(font "Intel Clear" (font_size 8)))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "input1[3..0]" (rect 0 0 67 15)(font "Intel Clear" (font_size 8)))
		(text "input1[3..0]" (rect 21 43 88 58)(font "Intel Clear" (font_size 8)))
		(line (pt 0 48)(pt 16 48)(line_width 3))
	)
	(port
		(pt 168 32)
		(output)
		(text "cmpOut" (rect 0 0 47 15)(font "Intel Clear" (font_size 8)))
		(text "cmpOut" (rect 100 27 147 42)(font "Intel Clear" (font_size 8)))
		(line (pt 168 32)(pt 152 32))
	)
	(drawing
		(rectangle (rect 16 16 152 80))
	)
)
(connector
	(pt 464 208)
	(pt 472 208)
	(bus)
)
(connector
	(pt 464 224)
	(pt 472 224)
	(bus)
)
(connector
	(pt 640 208)
	(pt 648 208)
)