From ec81a6b4d9a8f9ba53ddec43da6c96c9d414a50d Mon Sep 17 00:00:00 2001
From: TiagoRG <tiago.rgarcia@ua.pt>
Date: Sat, 2 Mar 2024 00:50:18 +0000
Subject: [PATCH] [AC2] Aula03 Addicionals

Signed-off-by: TiagoRG <tiago.rgarcia@ua.pt>
---
 2ano/2semestre/ac2/aula03/addicional-1.s | 27 +++++++++++
 2ano/2semestre/ac2/aula03/addicional-2.s | 62 ++++++++++++++++++++++++
 2ano/2semestre/ac2/aula03/part2-6.s      |  2 +-
 3 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 2ano/2semestre/ac2/aula03/addicional-1.s
 create mode 100644 2ano/2semestre/ac2/aula03/addicional-2.s

diff --git a/2ano/2semestre/ac2/aula03/addicional-1.s b/2ano/2semestre/ac2/aula03/addicional-1.s
new file mode 100644
index 0000000..974967f
--- /dev/null
+++ b/2ano/2semestre/ac2/aula03/addicional-1.s
@@ -0,0 +1,27 @@
+	.equ	ADDR_BASE, 0xBF88
+	.equ	TRISB, 0x6040
+	.equ	PORTB, 0x6050
+	.equ	TRISE, 0x6100
+	.equ	LATE,  0x6120
+
+	.data
+	.text
+	.globl main
+
+main:
+	lui	$t7, ADDR_BASE
+
+	lw	$t0, TRISE($t7)
+	andi	$t0, $t0, 0xFFC3
+	sw	$t0, TRISE($t7)
+
+	lw	$t0, TRISB($t7)
+	ori	$t0, $t0, 0x000F
+	sw	$t0, TRISB($t7)
+
+loop:
+	lw	$t0, PORTB($t7)
+	sll	$t0, $t0, 2
+	sw	$t0, LATE($t7)
+
+	j	loop
diff --git a/2ano/2semestre/ac2/aula03/addicional-2.s b/2ano/2semestre/ac2/aula03/addicional-2.s
new file mode 100644
index 0000000..cb84933
--- /dev/null
+++ b/2ano/2semestre/ac2/aula03/addicional-2.s
@@ -0,0 +1,62 @@
+	.equ	ADDR_BASE, 0xBF88
+	.equ	TRISE, 0x6100
+	.equ	LATE,  0x6120
+	.equ	TRISD, 0x60C0
+	.equ	LATD, 0x60E0
+
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
+
+	.data
+	.text
+	.globl main
+
+main:
+	lui	$t7, ADDR_BASE
+
+	lw	$t0, TRISE($t7)
+	andi	$t0, $t0, 0xFFFE
+	sw	$t0, TRISE($t7)
+
+	lw	$t0, TRISD($t7)
+	andi	$t0, $t0, 0xFFFE
+	sw	$t0, TRISD($t7)
+
+	li	$t0, 0x0000
+
+loop:
+	lw	$t1, LATE($t7)
+	andi	$t1, $t1, 0xFFFE
+	or	$t1, $t1, $t0
+	sw	$t1, LATE($t7)
+
+	lw	$t1, LATD($t7)
+	andi	$t1, $t1, 0xFFFE
+	or	$t1, $t1, $t0
+	sw	$t1, LATD($t7)
+
+	addi	$sp, $sp, -8
+	sw	$ra, 0($sp)
+	sw	$t0, 4($sp)
+
+	li	$a0, 500
+	jal	delay
+	
+	lw	$ra, 0($sp)
+	lw	$t0, 4($sp)
+	addi	$sp, $sp, 8
+
+	xori	$t0, $t0, 0x0001
+	j	loop
+
+# ----------- DELAY FUNCTION ------------
+
+delay:	li	$v0, RESET_CORE_TIMER
+	syscall
+
+wait:	li	$v0, READ_CORE_TIMER
+	syscall
+	mul	$t0, $a0, 20000
+	blt	$v0, $t0, wait
+
+	jr	$ra
diff --git a/2ano/2semestre/ac2/aula03/part2-6.s b/2ano/2semestre/ac2/aula03/part2-6.s
index 0b6cc53..e2d9786 100644
--- a/2ano/2semestre/ac2/aula03/part2-6.s
+++ b/2ano/2semestre/ac2/aula03/part2-6.s
@@ -20,7 +20,7 @@ main:
 	andi	$t0, $t0, 0xFFE1		# 1111 1111 1110 0001 (isola bits 4-1)
 	sw	$t0, TRISE($t7)			# Configura RE4-RE1 como output
 
-	li	$t0, 0x0010			# Iniciar contagem
+	li	$t0, 0x0000			# Iniciar contagem
 
 loop:
 	lw	$t1, LATE($t7)