diff --git a/2ano/2semestre/ac2/aula06/ex06.c b/2ano/2semestre/ac2/aula06/ex06.c index 6ec716d..3d4675d 100644 --- a/2ano/2semestre/ac2/aula06/ex06.c +++ b/2ano/2semestre/ac2/aula06/ex06.c @@ -55,7 +55,7 @@ int main() { int v = 0; while (1) { - if (i == 0){ + if (i == 0) { AD1CON1bits.ASAM = 1; // Start conversion while (IFS1bits.AD1IF == 0); // Wait while conversion not done int total = 0; diff --git a/2ano/2semestre/ac2/aula07/AC2-P-Aula07.pdf b/2ano/2semestre/ac2/aula07/AC2-P-Aula07.pdf new file mode 100644 index 0000000..11a59ed Binary files /dev/null and b/2ano/2semestre/ac2/aula07/AC2-P-Aula07.pdf differ diff --git a/2ano/2semestre/ac2/aula07/part1-1.c b/2ano/2semestre/ac2/aula07/part1-1.c new file mode 100644 index 0000000..0528f96 --- /dev/null +++ b/2ano/2semestre/ac2/aula07/part1-1.c @@ -0,0 +1,28 @@ +#include + +int main() { + TRISBbits.TRISB4 = 1; + AD1PCFGbits.PCFG4 = 0; + AD1CON1bits.SSRC = 7; + AD1CON1bits.CLRASAM = 1; + AD1CON3bits.SAMC = 1; + AD1CON2bits.SMPI = 0; + AD1CHSbits.CH0SA = 4; + AD1CON1bits.ON = 1; + + IPC6bits.AD1IP = 2; // configure priority of A/D interrupts + IEC1bits.AD1IE = 1; // enable A/D interrupts + IFS1bits.AD1IF = 0; // clear A/D interrupt flag + + EnableInterrupts(); + AD1CON1bits.ASAM = 1; + + while (1); +} + +void _int_(27) isr_adc(void) { + printInt(ADC1BUF0, 16 | 3 << 16); + putChar('\r'); + IFS1bits.AD1IF = 0; + AD1CON1bits.ASAM = 1; +} diff --git a/2ano/2semestre/ac2/aula07/part1-2.c b/2ano/2semestre/ac2/aula07/part1-2.c new file mode 100644 index 0000000..3455107 --- /dev/null +++ b/2ano/2semestre/ac2/aula07/part1-2.c @@ -0,0 +1,86 @@ +#include + +#define SAMPLES 8 + +volatile unsigned char voltage = 0; + +const unsigned int dis7Scodes[] = {0x3F, 0x06, 0x5B, 0x4F, 0x66, 0x6D, + 0xFD, 0x07, 0x7F, 0x6F, 0x77, 0xFC, + 0x39, 0x5E, 0xF9, 0xF1}; + +typedef enum { HIGH, LOW } flag; + +unsigned char toBdc(unsigned char value) { + return ((value / 10) << 4) + (value % 10); +} + +void send2displays(unsigned char value) { + static flag f = LOW; + value = toBdc(value); + unsigned char high = dis7Scodes[value >> 4]; + unsigned char low = dis7Scodes[value & 0x0F]; + + if (f == HIGH) { + LATD = (LATD & 0xFF9F) | 0x0040; + LATB = (LATB & 0x80FF) | high << 8; + f = LOW; + } else { + LATD = (LATD & 0xFF9F) | 0x0020; + LATB = (LATB & 0x80FF) | low << 8; + f = HIGH; + } +} + +void delay(unsigned int ms) { + resetCoreTimer(); + while (readCoreTimer() < ms * 20000); +} + +int main() { + TRISBbits.TRISB4 = 1; // RB4 digital output disconnected + AD1PCFGbits.PCFG4 = 0; // RB4 configured as analog input (AN4) + AD1CON1bits.SSRC = 7; // Conversion trigger selection bits: in this + // mode an internal counter ends sampling and + // starts conversion + AD1CON1bits.CLRASAM = 1; // Stop conversions when the 1st A/D converter + // interrupt is generated. At the same time, hardware + // clears the ASAM bit + AD1CON3bits.SAMC = 16; // Sample time is 16 TAD (TAD = 100 ns) + AD1CON2bits.SMPI = SAMPLES - 1; // Interrupt is generated after 16 samples + AD1CHSbits.CH0SA = 4; // Selects AN4 as input for the A/D converter + AD1CON1bits.ON = 1; // Enable A/D converter + + IPC6bits.AD1IP = 2; // configure priority of A/D interrupts + IEC1bits.AD1IE = 1; // enable A/D interrupts + IFS1bits.AD1IF = 0; // clear A/D interrupt flag + + TRISB &= 0x80FF; // Configure RB8-RB14 as outputs + TRISD &= 0xFF9F; // Configure RD5-RD6 as outputs + + EnableInterrupts(); + AD1CON1bits.ASAM = 1; + + int i = 0; + + while (1) { + if (i == 0) { + AD1CON1bits.ASAM = 1; // Start conversion + } + send2displays(voltage); + delay(10); + i = (i + 1) % 20; + } + + return 0; +} + +void _int_(27) isr_adc(void) { + AD1CON1bits.ASAM = 0; // Stop conversion + int total = 0; + int *p = (int *)(&ADC1BUF0); + for (; p <= (int *)(&ADC1BUFF); p+=4) + total += *p; + int val_ad = total / SAMPLES; + voltage = (val_ad * 33 + 511) / 1023; + IFS1bits.AD1IF = 0; // Reset AD1IF +} diff --git a/2ano/2semestre/ac2/aula07/part2-1.c b/2ano/2semestre/ac2/aula07/part2-1.c new file mode 100644 index 0000000..e2af7bc --- /dev/null +++ b/2ano/2semestre/ac2/aula07/part2-1.c @@ -0,0 +1,32 @@ +#include + +int main() { + TRISBbits.TRISB4 = 1; + AD1PCFGbits.PCFG4 = 0; + AD1CON1bits.SSRC = 7; + AD1CON1bits.CLRASAM = 1; + AD1CON3bits.SAMC = 16; + AD1CON2bits.SMPI = 0; + AD1CHSbits.CH0SA = 4; + AD1CON1bits.ON = 1; + + IPC6bits.AD1IP = 2; // configure priority of A/D interrupts + IEC1bits.AD1IE = 1; // enable A/D interrupts + IFS1bits.AD1IF = 0; // clear A/D interrupt flag + + TRISD &= 0xF7FF; // Configure RD11 as output + + EnableInterrupts(); + AD1CON1bits.ASAM = 1; + + while (1); +} + +void _int_(27) isr_adc(void) { + volatile int adc_value; + LATDbits.LATD11 = 0; + adc_value = ADC1BUF0; + IFS1bits.AD1IF = 0; + AD1CON1bits.ASAM = 1; + LATDbits.LATD11 = 1; +} diff --git a/2ano/2semestre/ac2/aula07/part2-2.c b/2ano/2semestre/ac2/aula07/part2-2.c new file mode 100644 index 0000000..a817b2a --- /dev/null +++ b/2ano/2semestre/ac2/aula07/part2-2.c @@ -0,0 +1,37 @@ +#include + +int main() { + TRISBbits.TRISB4 = 1; + AD1PCFGbits.PCFG4 = 0; + AD1CON1bits.SSRC = 7; + AD1CON1bits.CLRASAM = 1; + AD1CON3bits.SAMC = 16; + AD1CON2bits.SMPI = 0; + AD1CHSbits.CH0SA = 4; + AD1CON1bits.ON = 1; + + IPC6bits.AD1IP = 2; // configure priority of A/D interrupts + IEC1bits.AD1IE = 1; // enable A/D interrupts + IFS1bits.AD1IF = 0; // clear A/D interrupt flag + + TRISD &= 0xF7FF; // Configure RD11 as output + + EnableInterrupts(); + AD1CON1bits.ASAM = 1; + + while (1) LATDbits.LATD11 = 0; +} + +void _int_(27) isr_adc(void) { + volatile int adc_value; + adc_value = ADC1BUF0; + IFS1bits.AD1IF = 0; + AD1CON1bits.ASAM = 1; + LATDbits.LATD11 = 1; +} + +// Conversão A/D: 3340 ns +// Conversão + latência + prologo: 4020 ns +// Epilogo: 632 ns +// +// Overhead total: 4020 - 3340 + 632 = 680 + 632 = 1312 ns