From 6a1247a70ff74e3b7281c00ac9b853e949cc5fe3 Mon Sep 17 00:00:00 2001
From: TiagoRG <tiago.rgarcia@ua.pt>
Date: Fri, 1 Mar 2024 22:31:31 +0000
Subject: [PATCH] [AC2] Aula03 Refactor

Signed-off-by: TiagoRG <tiago.rgarcia@ua.pt>
---
 2ano/2semestre/ac2/aula03/part2-1.s |  4 +-
 2ano/2semestre/ac2/aula03/part2-2.s |  4 +-
 2ano/2semestre/ac2/aula03/part2-3.s |  4 +-
 2ano/2semestre/ac2/aula03/part2-4.s |  4 +-
 2ano/2semestre/ac2/aula03/part2-5.s | 37 +++++++-----------
 2ano/2semestre/ac2/aula03/part2-6.s | 39 +++++++------------
 2ano/2semestre/ac2/aula03/part2-7.s | 58 ++++++++++++-----------------
 7 files changed, 59 insertions(+), 91 deletions(-)

diff --git a/2ano/2semestre/ac2/aula03/part2-1.s b/2ano/2semestre/ac2/aula03/part2-1.s
index 64e580a..5cfdc22 100644
--- a/2ano/2semestre/ac2/aula03/part2-1.s
+++ b/2ano/2semestre/ac2/aula03/part2-1.s
@@ -12,8 +12,8 @@
 	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
diff --git a/2ano/2semestre/ac2/aula03/part2-2.s b/2ano/2semestre/ac2/aula03/part2-2.s
index 33b1bb4..237ea30 100644
--- a/2ano/2semestre/ac2/aula03/part2-2.s
+++ b/2ano/2semestre/ac2/aula03/part2-2.s
@@ -12,8 +12,8 @@
 	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
diff --git a/2ano/2semestre/ac2/aula03/part2-3.s b/2ano/2semestre/ac2/aula03/part2-3.s
index 068c86d..487144a 100644
--- a/2ano/2semestre/ac2/aula03/part2-3.s
+++ b/2ano/2semestre/ac2/aula03/part2-3.s
@@ -12,8 +12,8 @@
 	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
diff --git a/2ano/2semestre/ac2/aula03/part2-4.s b/2ano/2semestre/ac2/aula03/part2-4.s
index 7105912..78e073e 100644
--- a/2ano/2semestre/ac2/aula03/part2-4.s
+++ b/2ano/2semestre/ac2/aula03/part2-4.s
@@ -12,8 +12,8 @@
 	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
diff --git a/2ano/2semestre/ac2/aula03/part2-5.s b/2ano/2semestre/ac2/aula03/part2-5.s
index 5b47db2..a3303de 100644
--- a/2ano/2semestre/ac2/aula03/part2-5.s
+++ b/2ano/2semestre/ac2/aula03/part2-5.s
@@ -1,19 +1,9 @@
 	.equ	ADDR_BASE, 0xBF88
-	.equ	TRISB, 0x6040
-	.equ	PORTB, 0x6050
-	.equ	LATB,  0x6060
-	.equ	TRISC, 0x6080
-	.equ	PORTC, 0x6090
-	.equ	LATC,  0x60A0
-	.equ	TRISD, 0x60C0
-	.equ	PORTD, 0x60D0
-	.equ	LATD,  0x60E0
 	.equ	TRISE, 0x6100
-	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
@@ -33,11 +23,11 @@ main:
 	li	$t0, 0x0001			# Iniciar contagem
 
 loop:
-	lw	$t2, LATE($t7)
-	andi	$t2, $t2, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
-	sll	$t3, $t0, 1			# shift do contador para os bits 4-1
-	or	$t2, $t2, $t3			# merge contador com valor do LATE
-	sw	$t2, LATE($t7)			# atualiza valor do LATE
+	lw	$t1, LATE($t7)
+	andi	$t1, $t1, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
+	sll	$t2, $t0, 1			# shift do contador para os bits 4-1
+	or	$t1, $t1, $t2			# merge contador com valor do LATE
+	sw	$t1, LATE($t7)			# atualiza valor do LATE
 
 	li	$v0, RESET_CORE_TIMER
 	syscall
@@ -45,16 +35,15 @@ loop:
 delay:
 	li	$v0, READ_CORE_TIMER
 	syscall
-	move	$t6, $v0
+	move	$t2, $v0
 
-	blt	$t6, 13333333, delay
+	blt	$t2, 13333333, delay
 
-	lw	$t4, LATE($t7)			# ler valor dos leds
-	andi	$t4, $t4, 0x0010		# isolar bit 4
-	srl	$t4, $t4, 4			# colocar bit na posição menos significativa para o contador
-	xori	$t4, $t4, 0x0001		# negar bit
+	andi	$t1, $t1, 0x0010		# isolar bit 4
+	srl	$t1, $t1, 4			# colocar bit na posição menos significativa para o contador
+	xori	$t1, $t1, 0x0001		# negar bit
 	sll	$t0, $t0, 1			# shift left do contador
-	or	$t0, $t0, $t4			# colocar bit lido no contador
+	or	$t0, $t0, $t1			# colocar bit lido no contador
 
 	j	loop
 
diff --git a/2ano/2semestre/ac2/aula03/part2-6.s b/2ano/2semestre/ac2/aula03/part2-6.s
index c09018f..0b6cc53 100644
--- a/2ano/2semestre/ac2/aula03/part2-6.s
+++ b/2ano/2semestre/ac2/aula03/part2-6.s
@@ -1,19 +1,9 @@
 	.equ	ADDR_BASE, 0xBF88
-	.equ	TRISB, 0x6040
-	.equ	PORTB, 0x6050
-	.equ	LATB,  0x6060
-	.equ	TRISC, 0x6080
-	.equ	PORTC, 0x6090
-	.equ	LATC,  0x60A0
-	.equ	TRISD, 0x60C0
-	.equ	PORTD, 0x60D0
-	.equ	LATD,  0x60E0
 	.equ	TRISE, 0x6100
-	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
@@ -33,11 +23,11 @@ main:
 	li	$t0, 0x0010			# Iniciar contagem
 
 loop:
-	lw	$t2, LATE($t7)
-	andi	$t2, $t2, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
-	sll	$t3, $t0, 1			# shift do contador para os bits 4-1
-	or	$t2, $t2, $t3			# merge contador com valor do LATE
-	sw	$t2, LATE($t7)			# atualiza valor do LATE
+	lw	$t1, LATE($t7)
+	andi	$t1, $t1, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
+	sll	$t2, $t0, 1			# shift do contador para os bits 4-1
+	or	$t1, $t1, $t2			# merge contador com valor do LATE
+	sw	$t1, LATE($t7)			# atualiza valor do LATE
 
 	li	$v0, RESET_CORE_TIMER
 	syscall
@@ -45,16 +35,15 @@ loop:
 delay:
 	li	$v0, READ_CORE_TIMER
 	syscall
-	move	$t6, $v0
+	move	$t2, $v0
 
-	blt	$t6, 13333333, delay
+	blt	$t2, 13333333, delay
 
-	lw	$t4, LATE($t7)
-	andi	$t4, $t4, 0x0002
-	sll	$t4, $t4, 2
-	xori	$t4, $t4, 0x0008
-	srl	$t0, $t0, 1
-	or	$t0, $t0, $t4
+	andi	$t1, $t1, 0x0002		# isolar bit 1
+	sll	$t1, $t1, 2                     # colocar bit na posição mais significativa para o contador
+	xori	$t1, $t1, 0x0008                # negar bit
+	srl	$t0, $t0, 1                     # shift right do contador
+	or	$t0, $t0, $t1                   # colocar bit lido no contador
 
 	j	loop
 
diff --git a/2ano/2semestre/ac2/aula03/part2-7.s b/2ano/2semestre/ac2/aula03/part2-7.s
index 2afc29f..0aa8d80 100644
--- a/2ano/2semestre/ac2/aula03/part2-7.s
+++ b/2ano/2semestre/ac2/aula03/part2-7.s
@@ -1,19 +1,11 @@
 	.equ	ADDR_BASE, 0xBF88
 	.equ	TRISB, 0x6040
 	.equ	PORTB, 0x6050
-	.equ	LATB,  0x6060
-	.equ	TRISC, 0x6080
-	.equ	PORTC, 0x6090
-	.equ	LATC,  0x60A0
-	.equ	TRISD, 0x60C0
-	.equ	PORTD, 0x60D0
-	.equ	LATD,  0x60E0
 	.equ	TRISE, 0x6100
-	.equ	PORTE, 0x6110
 	.equ	LATE,  0x6120
 
-	.equ READ_CORE_TIMER, 11
-	.equ RESET_CORE_TIMER, 12
+	.equ	READ_CORE_TIMER, 11
+	.equ	RESET_CORE_TIMER, 12
 
 	.data
 	.text
@@ -30,18 +22,18 @@ main:
 	andi	$t0, $t0, 0xFFE1		# 1111 1111 1110 0001 (isola bits 4-1)
 	sw	$t0, TRISE($t7)			# Configura RE4-RE1 como output
 
-	lw	$t1, TRISB($t7)
-	ori	$t1, $t1, 0x0004		# 0000 0000 0000 0010 (isola bit 1)
-	sw	$t1, TRISB($t7)			# Configura RB1 como input
+	lw	$t0, TRISB($t7)
+	ori	$t0, $t0, 0x0004		# 0000 0000 0000 0010 (isola bit 1)
+	sw	$t0, TRISB($t7)			# Configura RB1 como input
 
 	li	$t0, 0x0010			# Iniciar contagem
 
 loop:
-	lw	$t2, LATE($t7)
-	andi	$t2, $t2, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
-	sll	$t3, $t0, 1			# shift do contador para os bits 4-1
-	or	$t2, $t2, $t3			# merge contador com valor do LATE
-	sw	$t2, LATE($t7)			# atualiza valor do LATE
+	lw	$t1, LATE($t7)
+	andi	$t1, $t1, 0xFFE1		# 1111 1111 1110 0001 (reset bits 4-1)
+	sll	$t2, $t0, 1			# shift do contador para os bits 4-1
+	or	$t1, $t1, $t2			# merge contador com valor do LATE
+	sw	$t1, LATE($t7)			# atualiza valor do LATE
 
 	li	$v0, RESET_CORE_TIMER
 	syscall
@@ -49,32 +41,30 @@ loop:
 delay:
 	li	$v0, READ_CORE_TIMER
 	syscall
-	move	$t6, $v0
+	move	$t2, $v0
 
-	blt	$t6, 13333333, delay
+	blt	$t2, 13333333, delay
 
 switch_check:
-	lw	$t6, PORTB($t7)
-	andi	$t6, $t6, 0x0004		# 0000 0000 0000 0100 (isola bit 3)
-	lw	$t4, LATE($t7)
-	beqz	$t6, move_right
+	lw	$t2, PORTB($t7)
+	andi	$t2, $t2, 0x0004		# 0000 0000 0000 0100 (isola bit 3)
+	beqz	$t2, move_right			# switch3 = 0: move_right, switch3 = 1: move_left
 
 move_left:
-	andi	$t4, $t4, 0x0010
-	srl	$t4, $t4, 4
-	xori	$t4, $t4, 0x0001
-	sll	$t0, $t0, 1
-	or	$t0, $t0, $t4
+	andi	$t1, $t1, 0x0010		# isolar bit 4
+	srl	$t1, $t1, 4			# colocar bit na posição menos significativa para o contador
+	xori	$t1, $t1, 0x0001                # negar bit
+	sll	$t0, $t0, 1                     # shift left do contador
 
 	j	switch_end
 
 move_right:
-	andi	$t4, $t4, 0x0002
-	sll	$t4, $t4, 2
-	xori	$t4, $t4, 0x0008
-	srl	$t0, $t0, 1
-	or	$t0, $t0, $t4
+	andi	$t1, $t1, 0x0002		# isolar bit 1
+	sll	$t1, $t1, 2                     # colocar bit na posição mais significativa para o contador
+	xori	$t1, $t1, 0x0008                # negar bit
+	srl	$t0, $t0, 1                     # shift right do contador
 
 switch_end:
+	or	$t0, $t0, $t1			# colocar bit lido no contador
 	j	loop