uaveiro-leci/1ano/isd/quartus-projects/Teste/simulation/qsim/Teste1.msim.vcd

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2023-01-11 18:07:46 +00:00
$comment
File created using the following command:
vcd file Teste1.msim.vcd -direction
$end
$date
Fri Dec 2 13:03:35 2022
$end
$version
ModelSim Version 2020.1
$end
$timescale
1ps
$end
$scope module teste3_vhd_vec_tst $end
$var wire 1 ! A $end
$var wire 1 " B $end
$var wire 1 # C $end
$var wire 1 $ D $end
$var wire 1 % F $end
$scope module i1 $end
$var wire 1 & gnd $end
$var wire 1 ' vcc $end
$var wire 1 ( unknown $end
$var wire 1 ) devoe $end
$var wire 1 * devclrn $end
$var wire 1 + devpor $end
$var wire 1 , ww_devoe $end
$var wire 1 - ww_devclrn $end
$var wire 1 . ww_devpor $end
$var wire 1 / ww_F $end
$var wire 1 0 ww_D $end
$var wire 1 1 ww_A $end
$var wire 1 2 ww_B $end
$var wire 1 3 ww_C $end
$var wire 1 4 \F~output_o\ $end
$var wire 1 5 \C~input_o\ $end
$var wire 1 6 \D~input_o\ $end
$var wire 1 7 \A~input_o\ $end
$var wire 1 8 \B~input_o\ $end
$var wire 1 9 \inst|inst3~0_combout\ $end
$var wire 1 : \inst|ALT_INV_inst3~0_combout\ $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
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