uaveiro-leci/1ano/2semestre/lsd/pratica01/part2/NAND2Block.bdf

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2020  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions 
and other software and tools, and any partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Intel Program License 
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "graphic" (version "1.4"))
(pin
	(input)
	(rect 200 232 368 248)
	(text "INPUT" (rect 125 0 154 10)(font "Arial" (font_size 6)))
	(text "inPort0" (rect 5 0 44 13)(font "Intel Clear" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 149 17)(font "Arial" (font_size 6)))
)
(pin
	(input)
	(rect 200 248 368 264)
	(text "INPUT" (rect 125 0 154 10)(font "Arial" (font_size 6)))
	(text "inPort1" (rect 5 0 43 13)(font "Intel Clear" ))
	(pt 168 8)
	(drawing
		(line (pt 84 12)(pt 109 12))
		(line (pt 84 4)(pt 109 4))
		(line (pt 113 8)(pt 168 8))
		(line (pt 84 12)(pt 84 4))
		(line (pt 109 4)(pt 113 8))
		(line (pt 109 12)(pt 113 8))
	)
	(text "VCC" (rect 128 7 149 17)(font "Arial" (font_size 6)))
)
(pin
	(output)
	(rect 704 232 880 248)
	(text "OUTPUT" (rect 1 0 41 10)(font "Arial" (font_size 6)))
	(text "outPort" (rect 90 0 127 11)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8))
		(line (pt 52 4)(pt 78 4))
		(line (pt 52 12)(pt 78 12))
		(line (pt 52 12)(pt 52 4))
		(line (pt 78 4)(pt 82 8))
		(line (pt 82 8)(pt 78 12))
		(line (pt 78 12)(pt 82 8))
	)
)
(symbol
	(rect 376 208 536 288)
	(text "AND2Gate" (rect 5 0 60 11)(font "Arial" ))
	(text "inst" (rect 8 64 26 75)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "inPort0" (rect 0 0 36 11)(font "Arial" ))
		(text "inPort0" (rect 21 27 57 38)(font "Arial" ))
		(line (pt 0 32)(pt 16 32))
	)
	(port
		(pt 0 48)
		(input)
		(text "inPort1" (rect 0 0 36 11)(font "Arial" ))
		(text "inPort1" (rect 21 43 57 54)(font "Arial" ))
		(line (pt 0 48)(pt 16 48))
	)
	(port
		(pt 160 32)
		(output)
		(text "outPort" (rect 0 0 37 11)(font "Arial" ))
		(text "outPort" (rect 108 27 145 38)(font "Arial" ))
		(line (pt 160 32)(pt 144 32))
	)
	(drawing
		(rectangle (rect 16 16 144 64))
	)
)
(symbol
	(rect 544 208 696 288)
	(text "NOTGate" (rect 5 0 53 11)(font "Arial" ))
	(text "inst1" (rect 8 64 32 77)(font "Intel Clear" ))
	(port
		(pt 0 32)
		(input)
		(text "inPort" (rect 0 0 30 11)(font "Arial" ))
		(text "inPort" (rect 21 27 51 38)(font "Arial" ))
		(line (pt 0 32)(pt 16 32))
	)
	(port
		(pt 152 32)
		(output)
		(text "outPort" (rect 0 0 37 11)(font "Arial" ))
		(text "outPort" (rect 100 27 137 38)(font "Arial" ))
		(line (pt 152 32)(pt 136 32))
	)
	(drawing
		(rectangle (rect 16 16 136 64))
	)
)
(connector
	(pt 704 240)
	(pt 696 240)
)
(connector
	(pt 544 240)
	(pt 536 240)
)
(connector
	(pt 368 240)
	(pt 376 240)
)
(connector
	(pt 368 256)
	(pt 376 256)
)