10 lines
115 B
VHDL
10 lines
115 B
VHDL
|
library IEEE;
|
||
|
|
use IEEE.STD_LOGIC_1164.all;
|
||
|
|
|
||
|
|
entity RegN is
|
||
|
|
generic ( N : positive := 8);
|
||
|
|
port
|
||
|
|
(
|
||
|
|
|
||
|
|
);
|
||
|
|
end RegN;
|