uaveiro-leci/1ano/2semestre/lsd/pratica03/AdderDemo/simulation/qsim/AdderDemo.msim.vcd

$comment
	File created using the following command:
		vcd file AdderDemo.msim.vcd -direction
$end
$date
	Wed Mar  8 11:38:18 2023
$end
$version
	ModelSim Version 2020.1
$end
$timescale
	1ps
$end

$scope module adder4_vhd_vec_tst $end
$var wire 1 ! a [3] $end
$var wire 1 " a [2] $end
$var wire 1 # a [1] $end
$var wire 1 $ a [0] $end
$var wire 1 % b [3] $end
$var wire 1 & b [2] $end
$var wire 1 ' b [1] $end
$var wire 1 ( b [0] $end
$var wire 1 ) cin $end
$var wire 1 * cout $end
$var wire 1 + s [3] $end
$var wire 1 , s [2] $end
$var wire 1 - s [1] $end
$var wire 1 . s [0] $end

$scope module i1 $end
$var wire 1 / gnd $end
$var wire 1 0 vcc $end
$var wire 1 1 unknown $end
$var wire 1 2 devoe $end
$var wire 1 3 devclrn $end
$var wire 1 4 devpor $end
$var wire 1 5 ww_devoe $end
$var wire 1 6 ww_devclrn $end
$var wire 1 7 ww_devpor $end
$var wire 1 8 ww_a [3] $end
$var wire 1 9 ww_a [2] $end
$var wire 1 : ww_a [1] $end
$var wire 1 ; ww_a [0] $end
$var wire 1 < ww_b [3] $end
$var wire 1 = ww_b [2] $end
$var wire 1 > ww_b [1] $end
$var wire 1 ? ww_b [0] $end
$var wire 1 @ ww_cin $end
$var wire 1 A ww_s [3] $end
$var wire 1 B ww_s [2] $end
$var wire 1 C ww_s [1] $end
$var wire 1 D ww_s [0] $end
$var wire 1 E ww_cout $end
$var wire 1 F \s[0]~output_o\ $end
$var wire 1 G \s[1]~output_o\ $end
$var wire 1 H \s[2]~output_o\ $end
$var wire 1 I \s[3]~output_o\ $end
$var wire 1 J \cout~output_o\ $end
$var wire 1 K \a[0]~input_o\ $end
$var wire 1 L \b[0]~input_o\ $end
$var wire 1 M \cin~input_o\ $end
$var wire 1 N \bit0|s~0_combout\ $end
$var wire 1 O \b[1]~input_o\ $end
$var wire 1 P \a[1]~input_o\ $end
$var wire 1 Q \bit0|cout~0_combout\ $end
$var wire 1 R \bit1|s~combout\ $end
$var wire 1 S \bit1|cout~0_combout\ $end
$var wire 1 T \a[2]~input_o\ $end
$var wire 1 U \b[2]~input_o\ $end
$var wire 1 V \bit2|s~combout\ $end
$var wire 1 W \bit2|cout~0_combout\ $end
$var wire 1 X \a[3]~input_o\ $end
$var wire 1 Y \b[3]~input_o\ $end
$var wire 1 Z \bit3|s~combout\ $end
$var wire 1 [ \bit3|cout~0_combout\ $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
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$end
#80000
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#160000
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#240000
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#1000000