uaveiro-leci/1ano/isd/quartus-projects/MuxDemo/simulation/modelsim/MuxDemo_modelsim.xrf

vendor_name = ModelSim
source_file = 1, /home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/MuxDemo/Mux16_1.bdf
source_file = 1, Waveform.vwf
source_file = 1, /home/tiagorg/repos/uaveiro-leci/1ano/isd/quartus-projects/MuxDemo/Mux2_1.bdf
design_name = Mux16_1
instance = comp, \Y~output , Y~output, Mux16_1, 1
instance = comp, \I14~input , I14~input, Mux16_1, 1
instance = comp, \Sel2~input , Sel2~input, Mux16_1, 1
instance = comp, \Sel1~input , Sel1~input, Mux16_1, 1
instance = comp, \I12~input , I12~input, Mux16_1, 1
instance = comp, \inst14|inst2~7 , inst14|inst2~7, Mux16_1, 1
instance = comp, \I13~input , I13~input, Mux16_1, 1
instance = comp, \I15~input , I15~input, Mux16_1, 1
instance = comp, \inst14|inst2~8 , inst14|inst2~8, Mux16_1, 1
instance = comp, \I5~input , I5~input, Mux16_1, 1
instance = comp, \I6~input , I6~input, Mux16_1, 1
instance = comp, \I4~input , I4~input, Mux16_1, 1
instance = comp, \inst14|inst2~2 , inst14|inst2~2, Mux16_1, 1
instance = comp, \I7~input , I7~input, Mux16_1, 1
instance = comp, \inst14|inst2~3 , inst14|inst2~3, Mux16_1, 1
instance = comp, \Sel4~input , Sel4~input, Mux16_1, 1
instance = comp, \Sel3~input , Sel3~input, Mux16_1, 1
instance = comp, \I2~input , I2~input, Mux16_1, 1
instance = comp, \I1~input , I1~input, Mux16_1, 1
instance = comp, \I0~input , I0~input, Mux16_1, 1
instance = comp, \inst14|inst2~4 , inst14|inst2~4, Mux16_1, 1
instance = comp, \I3~input , I3~input, Mux16_1, 1
instance = comp, \inst14|inst2~5 , inst14|inst2~5, Mux16_1, 1
instance = comp, \inst14|inst2~6 , inst14|inst2~6, Mux16_1, 1
instance = comp, \I10~input , I10~input, Mux16_1, 1
instance = comp, \I8~input , I8~input, Mux16_1, 1
instance = comp, \I9~input , I9~input, Mux16_1, 1
instance = comp, \inst14|inst2~0 , inst14|inst2~0, Mux16_1, 1
instance = comp, \I11~input , I11~input, Mux16_1, 1
instance = comp, \inst14|inst2~1 , inst14|inst2~1, Mux16_1, 1
instance = comp, \inst14|inst2~9 , inst14|inst2~9, Mux16_1, 1
design_name = hard_block
instance = comp, \~ALTERA_ASDO_DATA1~~ibuf , ~ALTERA_ASDO_DATA1~~ibuf, hard_block, 1
instance = comp, \~ALTERA_FLASH_nCE_nCSO~~ibuf , ~ALTERA_FLASH_nCE_nCSO~~ibuf, hard_block, 1
instance = comp, \~ALTERA_DATA0~~ibuf , ~ALTERA_DATA0~~ibuf, hard_block, 1