uaveiro-leci/1ano/2semestre/lsd/pratica02/part1/simulation/qsim/Dec2_4EnDemo.msim.vcd

$comment
	File created using the following command:
		vcd file Dec2_4EnDemo.msim.vcd -direction
$end
$date
	Wed Mar  1 10:28:41 2023
$end
$version
	ModelSim Version 2020.1
$end
$timescale
	1ps
$end

$scope module dec2_4en_vhd_vec_tst $end
$var wire 1 ! enable $end
$var wire 1 " inputs [1] $end
$var wire 1 # inputs [0] $end
$var wire 1 $ outputs [3] $end
$var wire 1 % outputs [2] $end
$var wire 1 & outputs [1] $end
$var wire 1 ' outputs [0] $end

$scope module i1 $end
$var wire 1 ( gnd $end
$var wire 1 ) vcc $end
$var wire 1 * unknown $end
$var wire 1 + devoe $end
$var wire 1 , devclrn $end
$var wire 1 - devpor $end
$var wire 1 . ww_devoe $end
$var wire 1 / ww_devclrn $end
$var wire 1 0 ww_devpor $end
$var wire 1 1 ww_enable $end
$var wire 1 2 ww_inputs [1] $end
$var wire 1 3 ww_inputs [0] $end
$var wire 1 4 ww_outputs [3] $end
$var wire 1 5 ww_outputs [2] $end
$var wire 1 6 ww_outputs [1] $end
$var wire 1 7 ww_outputs [0] $end
$var wire 1 8 \outputs[0]~output_o\ $end
$var wire 1 9 \outputs[1]~output_o\ $end
$var wire 1 : \outputs[2]~output_o\ $end
$var wire 1 ; \outputs[3]~output_o\ $end
$var wire 1 < \enable~input_o\ $end
$var wire 1 = \inputs[1]~input_o\ $end
$var wire 1 > \inputs[0]~input_o\ $end
$var wire 1 ? \outputs~0_combout\ $end
$var wire 1 @ \outputs~1_combout\ $end
$var wire 1 A \outputs~2_combout\ $end
$var wire 1 B \outputs~3_combout\ $end
$upscope $end
$upscope $end
$enddefinitions $end
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